GAL18V10B-20LP

GAL18V10B-20LP

Data Sheet

Attribute
Description
Manufacturer Part Number
GAL18V10B-20LP
Description
SPLD
Manufacturer Lead Time
20 weeks

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Product Attributes

Type Description
Category
Reconfigurable Device Type EE PLD
Maximum Propagation Delay 20.0ns
Onboard Voltage Regulator 4.75 V ~ 5.25 V
Logic Block Resources -
Programmable Macrocell Count 10
Logic Gate Total -
I/O Pins -
Ambient Temp Range 0°C ~ 75°C
Attachment Mounting Style Through Hole
Component Housing Style 20-DIP (0.300", 7.62mm)

Description

Measures resistance at forward current EE PLD for LED or diode evaluation. Presents maximum tpd(1) delay quantified as 20.0ns. Mounting style Through Hole for structural integrity. Total macrocells 10 for digital logic integration. Operating temperature 0°C ~ 75°C for thermal stability. Enclosure/case 20-DIP (0.300", 7.62mm) providing mechanical and thermal shielding. Configurable type EE PLD for device setup. Peak Vce(on) at Vge EE PLD for transistor parameters. Internal voltage supply 4.75 V ~ 5.25 V for devices.

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